12,098 Circuit Design jobs in India

Title:Analog Circuit Design Engineer:

Exp Level:2+yrs

Location: Banglaore

Job Description:

1. B.Tech or M.Tech. in Electronics and Electrical Engineering from an institute of repute.

2. 2 + years of experience in Analog and SERDES IP Circuit Design.

3. The candidate should have relevant experience in following Analog IPs like GPIO, RCOMP, ADC, DAC, LDO, PLL, Thermal Sensor, Voltage Monitor, Process Monitor and their blocks and SERDES IPs i.e. DLL, PLL, Clocking path Analysis, SERDES System Design and Analysis, Power Delivery Analysis, Transmitter (With or without equalization FFE), Receiver (with equalization – CTLE, DFE), Channel Analysis, LDO, RCOMP, Sensors – Process Monitor, Temp Sensor, Voltage Sensor, GPIOs, High Speed View / Test IOs, DFX, High Speed ADC etc.

4. The candidate should have knowledge of one of the following SERDES protocols i.e. DDR IO, UCIe, PCIe, HBMIO, HDMI, MIPI – CDPHY, HDMI etc.

5. The candidate should be well versed with the design tools like Cadence Virtuoso, Spectre / HSpice Simulators, High Speed Simulator APS/XA, Waveform viewer etc.

6. Knowledge and expertise in .lib generation and other views generation will be preferred.

7. Expertise in any scripting language (e.g. PERL, TCL, Python, SKILL) will be also be preferred.

8. The candidate necessarily should have very good communication skills and should be a team player.

9. The candidate should be having problem solving approach and should be able to report blocking issues during the project, as required.

Interested can share Cv to

Hi All,

Title:Analog Circuit Design Engineer:

Exp Level:2+yrs

Location: Banglaore

Job Description:

1. B.Tech or M.Tech. in Electronics and Electrical Engineering from an institute of repute.

2. 2 + years of experience in Analog and SERDES IP Circuit Design.

3. The candidate should have relevant experience in following Analog IPs like GPIO, RCOMP, ADC, DAC, LDO, PLL, Thermal Sensor, Voltage Monitor, Process Monitor and their blocks and SERDES IPs i.e. DLL, PLL, Clocking path Analysis, SERDES System Design and Analysis, Power Delivery Analysis, Transmitter (With or without equalization FFE), Receiver (with equalization – CTLE, DFE), Channel Analysis, LDO, RCOMP, Sensors – Process Monitor, Temp Sensor, Voltage Sensor, GPIOs, High Speed View / Test IOs, DFX, High Speed ADC etc.

4. The candidate should have knowledge of one of the following SERDES protocols i.e. DDR IO, UCIe, PCIe, HBMIO, HDMI, MIPI – CDPHY, HDMI etc.

5. The candidate should be well versed with the design tools like Cadence Virtuoso, Spectre / HSpice Simulators, High Speed Simulator APS/XA, Waveform viewer etc.

6. Knowledge and expertise in .lib generation and other views generation will be preferred.

7. Expertise in any scripting language (e.g. PERL, TCL, Python, SKILL) will be also be preferred.

8. The candidate necessarily should have very good communication skills and should be a team player.

9. The candidate should be having problem solving approach and should be able to report blocking issues during the project, as required.

Thanks,

K Himabindu

JD:

Analog Circuit Design Engineer:

• 3+ years of experience in one of the following areas.
• Circuit design experience in analog/mixed signal CMOS circuits in High speed Memory interfaces (DDR3/4/5, LPDDR3/4x/5, GDDR5/6) or SerDes Interfaces (PCIe, MIPI, HDMI, USB, SATA etc ) or
• Design experience in high-speed analog/mixed-signal blocks for SerDes PHYs such as Rx, CDR, DFE, PI, Tx, PLL, LDO, Comparators, bias generator or experience in - OpAmps, Comparators, Bandgap References, Charge pump, and other analog building blocks or HBM2E SoC analog sub-block design such as DLL, PLL, HBMIO, Clktree, etc.

• Bachelors or Master degree, major in Micro-Electronics, Electronic Engineering or equivalent Ability to work effectively alone or as well as in a team.
• Essential that the individual demonstrates strong communication, verbal and written Requires good communication skills in English.
• Ability to lead a team of junior engineers.

Location: Bangalore

Hi All,

Title:Analog Circuit Design Engineer:

Exp Level:2+yrs

Location: Banglaore

Job Description:

1. B.Tech or M.Tech. in Electronics and Electrical Engineering from an institute of repute.

2. 2 + years of experience in Analog and SERDES IP Circuit Design.

3. The candidate should have relevant experience in following Analog IPs like GPIO, RCOMP, ADC, DAC, LDO, PLL, Thermal Sensor, Voltage Monitor, Process Monitor and their blocks and SERDES IPs i.e. DLL, PLL, Clocking path Analysis, SERDES System Design and Analysis, Power Delivery Analysis, Transmitter (With or without equalization FFE), Receiver (with equalization – CTLE, DFE), Channel Analysis, LDO, RCOMP, Sensors – Process Monitor, Temp Sensor, Voltage Sensor, GPIOs, High Speed View / Test IOs, DFX, High Speed ADC etc.

4. The candidate should have knowledge of one of the following SERDES protocols i.e. DDR IO, UCIe, PCIe, HBMIO, HDMI, MIPI – CDPHY, HDMI etc.

5. The candidate should be well versed with the design tools like Cadence Virtuoso, Spectre / HSpice Simulators, High Speed Simulator APS/XA, Waveform viewer etc.

6. Knowledge and expertise in .lib generation and other views generation will be preferred.

7. Expertise in any scripting language (e.g. PERL, TCL, Python, SKILL) will be also be preferred.

8. The candidate necessarily should have very good communication skills and should be a team player.

9. The candidate should be having problem solving approach and should be able to report blocking issues during the project, as required.

Thanks,

K Himabindu

Title:Analog Circuit Design Engineer:

Exp Level:2+yrs

Location: Banglaore

Job Description:

1. B.Tech or M.Tech. in Electronics and Electrical Engineering from an institute of repute.

2. 2 + years of experience in Analog and SERDES IP Circuit Design.

3. The candidate should have relevant experience in following Analog IPs like GPIO, RCOMP, ADC, DAC, LDO, PLL, Thermal Sensor, Voltage Monitor, Process Monitor and their blocks and SERDES IPs i.e. DLL, PLL, Clocking path Analysis, SERDES System Design and Analysis, Power Delivery Analysis, Transmitter (With or without equalization FFE), Receiver (with equalization – CTLE, DFE), Channel Analysis, LDO, RCOMP, Sensors – Process Monitor, Temp Sensor, Voltage Sensor, GPIOs, High Speed View / Test IOs, DFX, High Speed ADC etc.

4. The candidate should have knowledge of one of the following SERDES protocols i.e. DDR IO, UCIe, PCIe, HBMIO, HDMI, MIPI – CDPHY, HDMI etc.

5. The candidate should be well versed with the design tools like Cadence Virtuoso, Spectre / HSpice Simulators, High Speed Simulator APS/XA, Waveform viewer etc.

6. Knowledge and expertise in .lib generation and other views generation will be preferred.

7. Expertise in any scripting language (e.g. PERL, TCL, Python, SKILL) will be also be preferred.

8. The candidate necessarily should have very good communication skills and should be a team player.

9. The candidate should be having problem solving approach and should be able to report blocking issues during the project, as required.

Interested can share Cv to

JD:

Analog Circuit Design Engineer:

• 3+ years of experience in one of the following areas.
• Circuit design experience in analog/mixed signal CMOS circuits in High speed Memory interfaces (DDR3/4/5, LPDDR3/4x/5, GDDR5/6) or SerDes Interfaces (PCIe, MIPI, HDMI, USB, SATA etc ) or
• Design experience in high-speed analog/mixed-signal blocks for SerDes PHYs such as Rx, CDR, DFE, PI, Tx, PLL, LDO, Comparators, bias generator or experience in - OpAmps, Comparators, Bandgap References, Charge pump, and other analog building blocks or HBM2E SoC analog sub-block design such as DLL, PLL, HBMIO, Clktree, etc.

• Bachelors or Master degree, major in Micro-Electronics, Electronic Engineering or equivalent Ability to work effectively alone or as well as in a team.
• Essential that the individual demonstrates strong communication, verbal and written Requires good communication skills in English.
• Ability to lead a team of junior engineers.

Location: Bangalore

JD:

Analog Circuit Design Engineer:

• 3+ years of experience in one of the following areas.
• Circuit design experience in analog/mixed signal CMOS circuits in High speed Memory interfaces (DDR3/4/5, LPDDR3/4x/5, GDDR5/6) or SerDes Interfaces (PCIe, MIPI, HDMI, USB, SATA etc ) or
• Design experience in high-speed analog/mixed-signal blocks for SerDes PHYs such as Rx, CDR, DFE, PI, Tx, PLL, LDO, Comparators, bias generator or experience in - OpAmps, Comparators, Bandgap References, Charge pump, and other analog building blocks or HBM2E SoC analog sub-block design such as DLL, PLL, HBMIO, Clktree, etc.

• Bachelors or Master degree, major in Micro-Electronics, Electronic Engineering or equivalent Ability to work effectively alone or as well as in a team.
• Essential that the individual demonstrates strong communication, verbal and written Requires good communication skills in English.
• Ability to lead a team of junior engineers.

Location: Bangalore

T itle/Position: Analog circuit design engineer  

Experience: 2-8 years  

Location: Bangalore  

About us:  

Tessolve Semiconductors, a venture of Hero Electronix, is a Design and Test Engineering Service Company providing End to End Solutions from Product Engineering, Software, Hardware, Wireless, Automotive and Embedded Solutions. Tessolve offers a unique combination of pre-silicon and post-silicon expertise to provide an efficient turnkey solution for silicon bring-up, spec to the product. With 3500+ employees worldwide,  

Tessolve provides a one-stop-shop solution with full-fledged hardware and software capabilities, including its advanced silicon and system testing labs. Tessolve offers a Turnkey ASIC Solution, from design to packaged parts. We have a global presence with office locations in the United States, India, Singapore, Malaysia, Germany, United Kingdom, China, UK, Japan, Thailand, Philippines, and Test Labs in India, Singapore, Malaysia, Austin, San Jose.  

Tessolve offers a highly competitive compensation and benefits along with an electric work environment to scale one’s intellect, skills and growth.  

We are seeking a highly skilled and experienced Analog Circuit Design Engineer to join our dynamic team in Bangalore . The successful candidate will play a crucial role in the design and development of PLLs, high-speed SERDES, integrated filters, ADCs, DACs, and various other analog building blocks. If you have a solid background in mixed-signal CMOS circuit design and a passion for innovation, we invite you to apply for this exciting opportunity.  

Responsibilities:  

Design and architect CMOS analog and mixed-signal integrated circuits  

Simulate designs using state-of-the-art CAD tools  

Document designs and simulation results to ensure effective communication within the team  

Collaborate with cross-functional teams to meet project goals and deadlines  

Qualifications:  

Bachelor's degree in Electronics/ Electrical Engineering or related field.  

3 to 10 years of industry experience in mixed-signal CMOS circuit design  

Proficiency in designing high-speed SERDES circuits  

Strong understanding of layout issues in analog circuit design  

Experience with circuit simulators such as HSPICE, Spectre, etc.  

Familiarity with Cadence Design Environment is an asset  

Excellent written and oral communication skills  

Ability to work effectively in a collaborative team environment  

Innovative and creative thinker with a passion for solving complex problems  

Quick learner with the ability to ramp up on new projects  

Working knowledge of PERL and UNIX shell scripting languages is an asset.  

Disclaimer:  

At Tessolve , we are committed to fostering a workplace that embraces and celebrates diversity in all its forms. We believe that diverse teams drive innovation, creativity, and success. We are dedicated to creating an inclusive environment where all employees, regardless of their race, color , religion, gender, gender identity or expression, sexual orientation, national origin, genetics, disability, age, or veteran status, feel valued and respected. We believe in fair and equitable treatment for all employees and aim to eliminate any biases or barriers that may hinder personal or professional growth .