9,085 Design Verification jobs in India

Over 3 years of digital IP verification, advanced knowledge of ASIC/SOC Design flow and state of the art verification flow

Proficient with Verilog, System Verilog and UVM.

· Good in UVM concepts and SystemVerilog language. (SVA, UVM scoreboard)

· Good in defining and developing UVM based verification frameworks, testbenches, processes and flows.

· Good in working in Linux and Windows environments.

· Familiarity with power aware simulation and firmware/hardware co-verification is a plus.

· Familiarity with industry standard high-speed protocols such as USB, PCIE, UFS, SATA, Ethernet is a plus.

· Familiarity with industry standard interconnects such as AMBA (AXI, APB, AHB) is a plus.

Sub System Verification Engineer/Lead Engineer

(3-15 Years Experience)

Mediatek is building Sub System DV teams in Bangalore to cater to the verification challenges in our next gen Smartphone, Compute and Automotive chips. We are seeking experienced Design Verification Engineers with 3-15 years of experience, specifically in subsystem verification or SoC verification, to join our highly talented verification team at Bangalore.

The candidate needs to have a strong background in Sub System verification methodology and flows. Should have exposure to different verification methodologies at Sub System or SoC Level. Experience in test planning & testbench design/improvements and coverage closure is needed. Low power verification exposure is a plus.

Must have strong System Verilog programming skills and experience with UVM methodology. Should possess excellent problem-solving skills and ability to work collaboratively in a fast-paced environment spanning across geographies.

Senior candidates with experience in leading teams will be considered for higher/lead roles.

Key Responsibilities:

• Develop and implement comprehensive verification test plans for subsystems components and IP’s in those sub-system.
• Build testbenches from scratch for new Sub systems, develop verification flows and test cases using System Verilog and UVM methodology.
• Drive functional verification of RTL designs at Sub System level or SoC Level including simulation, debugging and coverage closure, ensuring high-quality and robust designs.
• Collaborate with design engineers to understand detailed design specifications and target corner cases and various configurations of subsystem levels.
• Generate and analyze verification metrics to regularly track progress and ensure timely coverage closure.
• Participate in design and verification reviews, test plan reviews, methodology reviews, providing technical expertise and insights.
• Incorporate newer verification techniques and methodologies to improve verification efficiency and effectiveness.
• Guide and mentor junior verification engineers and provide technical guidance .

Qualifications & Experience:

• Bachelor's or Master's degree in Electrical/Electronics Engineering, Computer Engineering, or related fields from an institute of repute.
• Proficiency in verification languages and methodologies, such as SystemVerilog, UVM, and other industry-standard tools.
• Experience with scripting languages (e.g., Python, Perl, Tcl) for automation and tool integration.
• Excellent problem-solving skills and attention to detail.
• Need to have strong oral and written communication skills, with an ability to work as a team player in a fast-paced collaborative environment.
• Track record of successfully participating in or leading verification of complex IP blocks, Subsystems or SoC Modules.
• 3-15 years of experience in design verification, with a focus on Subsystem/SoC verification. Candidates with higher experience will be considered for senior or lead roles. Prior experience of leading teams is needed for Lead role.

Experience: 5 Years

Location: Bangalore/Hyderabad

Education: B.E/B.Tech in ECE/EEE or M.E/M.Tech in VLSI/Electronics

Roles and Responsibilities

DDR Verification: Lead the verification of DDR memory controller and PHY designs, ensuring compliance with DDR standards such as DDR3, DDR4, DDR5, and other memory interface protocols.

Testbench Development: Develop and implement scalable, reusable, and efficient verification environments and testbenches for DDR designs using SystemVerilog, UVM (Universal Verification Methodology), and other industry-standard verification methodologies.

Protocol Compliance: Ensure the DDR design meets protocol specifications, including command, data, and clock synchronization, read/write cycles, burst transfers, refresh cycles, error handling, and power management.

Verification Plan Creation: Develop detailed verification plans based on DDR specifications and requirements, ensuring full coverage of corner cases, timing, and protocol validation.

Simulation & Debugging: Run simulations and debug issues using tools such as Questa, VCS, or ModelSim, applying advanced debugging techniques such as waveform analysis, assertion-based verification, and code coverage.

Regression Testing: Set up and manage regression testing for DDR functionality to ensure continuous validation and early detection of design issues.

Verification Coverage: Achieve high functional and protocol coverage, ensuring that critical aspects of DDR design, including timing constraints, corner cases, and failure scenarios, are thoroughly verified.

Formal Verification: Implement formal verification techniques to validate key components of the DDR design, ensuring correctness in timing and data flow, and verifying the most critical operations.

Job Summary:

We are looking for a talented and motivated Design Verification Engineer to join our team and play a key role in ensuring the functionality and quality of our next-generation integrated circuits (ICs). This position offers the opportunity to work on challenging projects while utilizing your expertise in verification methodologies and tools.

Responsibilities:

• Develop and implement comprehensive verification plans using industry-standard methodologies (e.g., UVM)
• Design and write robust verification environments (testbenches) to achieve high code coverage
• Utilize simulation tools (e.g., ModelSim, Cadence Incisive, Synopsys VCS) to verify RTL functionality
• Debug and analyze verification failures to identify the root cause of design issues
• Collaborate with RTL design engineers to resolve functional bugs and ensure design revisions meet verification requirements
• Participate in code reviews and ensure adherence to verification coding standards
• Stay up-to-date with the latest verification tools and methodologies

Qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's degree a plus)
• 5-7 years of experience in design verification for ASICs or SoCs
• Strong understanding of digital design principles (combinational logic, sequential logic)
• Proven ability to develop and debug complex verification environments
• Proficiency in Verilog or VHDL with experience in verification methodologies (e.g., UVM)
• Experience with simulation tools and scripting languages (e.g., Python, Perl) is a plus
• Excellent analytical and problem-solving skills
• Strong communication and collaboration skills to work effectively in a team environment

Benefits:

• Competitive salary and benefits package
• Opportunity to work on leading-edge technologies and projects
• Collaborative and dynamic work environment
• Potential for professional development and career advancement

Design Verification

mandatory skill : Power management.

Experience : 3-4 years

Location : Hyderabad

SoC Verification. preferably in Power Management. SoC Reset/Boot Flows.

Experience: 5 Years

Location: Bangalore/Hyderabad

Education: B.E/B.Tech in ECE/EEE or M.E/M.Tech in VLSI/Electronics

Roles and Responsibilities

DDR Verification: Lead the verification of DDR memory controller and PHY designs, ensuring compliance with DDR standards such as DDR3, DDR4, DDR5, and other memory interface protocols.

Testbench Development: Develop and implement scalable, reusable, and efficient verification environments and testbenches for DDR designs using SystemVerilog, UVM (Universal Verification Methodology), and other industry-standard verification methodologies.

Protocol Compliance: Ensure the DDR design meets protocol specifications, including command, data, and clock synchronization, read/write cycles, burst transfers, refresh cycles, error handling, and power management.

Verification Plan Creation: Develop detailed verification plans based on DDR specifications and requirements, ensuring full coverage of corner cases, timing, and protocol validation.

Simulation & Debugging: Run simulations and debug issues using tools such as Questa, VCS, or ModelSim, applying advanced debugging techniques such as waveform analysis, assertion-based verification, and code coverage.

Regression Testing: Set up and manage regression testing for DDR functionality to ensure continuous validation and early detection of design issues.

Verification Coverage: Achieve high functional and protocol coverage, ensuring that critical aspects of DDR design, including timing constraints, corner cases, and failure scenarios, are thoroughly verified.

Formal Verification: Implement formal verification techniques to validate key components of the DDR design, ensuring correctness in timing and data flow, and verifying the most critical operations.

We are hiring for Design Verification role to join our HCLTech family in Kochi.

MDA - Custom Layout (1.) To design Soft core and fabrication (2.) To develop code and do Code Synthesis| place & Route (3.) To identify Target Technology and define Micro Architecture (4.) To procure and manage vendor (5.) To select suitable device/hardware for the assigned module (6.) To support Verification phase (7.) To understand the client requirements; provide status reports and participate in client review meetings

About HCLTech

HCLTech is a global technology company, spread across 60 countries, delivering industry-leading capabilities centered around digital, engineering, cloud and AI, powered by a broad portfolio of technology services and products. We work with clients across all major verticals, providing industry solutions for Financial Services, Manufacturing, Life Sciences and Healthcare, Technology and Services, Telecom and Media, Retail and CPG, and Public Services. We re powered by our people a global, diverse, multi-generational talent - representing 161 nationalities whose unique spark, perspective and boundless passion drive our culture of proactive value creation and problem-solving.

Our purpose is to bring together the best of technology and our people to supercharge progress for everyone, everywhere our clients, partners, their stakeholders, communities, and the planet. As a company, we are deeply focused on accelerating our ESG agenda. We are also creating technology-enabled sustainable solutions with and for our clients and partners. We embed ESG imperatives into every aspect of our business and ensure that the progress we supercharge is responsible, inclusive and beneficial to all our stakeholders in the long term. We have committed to achieving net zero by 2040.

To learn more about how we can supercharge progress for you, visit