172 Semiconductor jobs in India

Location: Hyderabad, On-site - WFO

Experience: 5-7 Years

Mode of Interview: Virtual & F2F

Preferred Candidate: Local Candidates & Immediate Joiners

Shift Timing: General Shift

Transport is Provided

Key Skills:

Primary Skills: 5+ Years of experience in SV, UVM, Test Bench Development, Soc, Full-chip verification, any memory experience

Good to Have: GLS, STA, Python knowledge, circuit characterization

Job Description & Responsibilities:

Design verification role, with experience in

Verilog simulation, UVM methodology, and full-chip verification, with memory experience being

beneficial and preferred

Candidate should have a quick learning ability, a positive attitude, and strong technical skills in

system Verilog and UVM.

Project involves Graphics DDR7, an industry-leading product.

UVM simulation and full-chip verification are key skills, with a minimum educational requirement for a bachelor's degree.

Familiarity with static timing analysis, GLS

Familiarity with circuit characterization, timing libraries - files and formats, timing arcs.

Familiarity with Python automation for test bench development is desirable

Educational Qualification & Other skills:

Strong communication skills, with the ability to convey complex technical concepts to other

design peers in verbal and written form.

A proactive learner with strong analytical and problem-solving skills."

Job Title:
ASIC Verification Engineer

Location:
India (Bangalore / Hyderabad / Pune / Noida / Chennai)

Experience Level:
2–10+ Years

Employment Type:
Full-Time | Permanent

Job Description:

We are seeking a highly motivated and detail-oriented ASIC Verification Engineer to join our semiconductor development team. The ideal candidate will be responsible for verifying complex digital designs at the IP, subsystem, or SoC level. This role requires a strong understanding of verification methodologies, digital design concepts, and industry-standard protocols.

Key Responsibilities:

• Develop and execute detailed verification plans based on design specifications.
• Build and maintain robust and reusable testbenches using SystemVerilog and UVM .
• Perform functional, regression , and coverage-driven testing for digital IPs and SoCs.
• Analyze and debug RTL failures using simulation tools and waveform viewers.
• Collaborate with design, architecture, and firmware teams to identify and resolve issues.
• Contribute to the development of verification IPs and methodology improvements.
• Track and report verification metrics, coverage statistics, and bug status.

Required Skills & Qualifications:

• Bachelor's or Master's degree in Electronics , Electrical Engineering , or a related field.
• Solid hands-on experience in SystemVerilog , UVM , and RTL simulation.
• Proficiency in verifying standard interfaces such as AXI , AHB , APB , PCIe , or DDR .
• Strong debugging skills and experience with tools such as VCS , QuestaSim , or Xcelium .
• Familiarity with functional coverage , code coverage , and assertion-based verification .
• Scripting knowledge in Python , Perl , or TCL for automation is an advantage.
• Excellent communication and collaboration skills.

Preferred Qualifications:

• Experience with Formal Verification , Low Power Verification (UPF) , or Emulation is a plus.
• Prior experience in Silicon bring-up or post-silicon validation is desirable.

Hi All,

Eximietas:
Eximietas Design is a leading technology consulting and solutions development firm specializing in the VLSI, Cloud Computing, Cyber Security, and AI/ML domains.

Hiring:
Senior ASIC SOC RTL Design Engineers.

Minimum Qualifications:
Bachelor's degree in Computer Science, Electrical/Electronics

Engineering 5+ years of ASIC SOC RTL (Micro-architecture) experience.

Strong understanding of design concepts.

ASIC flow Understanding of SDC Understanding STA reports

Understanding of CDC logic Knowledge of lint rules and exceptions

Design and use of block level simulations to bring up IP.

Knowledge of AMBA buses and when to use them.

Knowledge on common processor architectures (ARM, RiscV)

FPGA experience includes part selection, pin assignment, timing constraints, synthesis, and debug of design in the FPGA.

Relevant tool experience such as:
Socrates, Core Consultant in addition to standard simulation tools (xcellium, vcs, etc) JTAG debugging experience (Coresight, Lauterbach, etc).

Low power design techniques / UPF As an RTL Engineer, Candidate will be responsible to work at IP, Subsystem, or SoC-related tasks.

Responsibilities:

Collaborate with architects, pre- and post-silicon verification teams to meet deadlines.

Coordinate with customer leads, ensuring all deliverables and timelines are met.

Location:
Visakhapatnam / Bangalore.

Interested Engineers, please share your updated resume:

Location:
Hyderabad, On-site - WFO

Experience:
5-7 Years

Mode of Interview:
Virtual & F2F

Preferred Candidate:
Local Candidates & Immediate Joiners

Shift Timing:
General Shift

Transport is Provided

Key Skills:

Primary Skills:
5+ Years of experience in SV, UVM, Test Bench Development, Soc, Full-chip verification, any memory experience

Good to Have:
GLS, STA, Python knowledge, circuit characterization

Job Description & Responsibilities:

Design verification role, with experience in

Verilog simulation, UVM methodology, and full-chip verification, with memory experience being

beneficial and preferred

Candidate should have a quick learning ability, a positive attitude, and strong technical skills in

system Verilog and UVM.

Project involves Graphics DDR7, an industry-leading product.

UVM simulation and full-chip verification are key skills, with a minimum educational requirement for a bachelor's degree.

Familiarity with static timing analysis, GLS

Familiarity with circuit characterization, timing libraries - files and formats, timing arcs.

Familiarity with Python automation for test bench development is desirable

Educational Qualification & Other skills:

Strong communication skills, with the ability to convey complex technical concepts to other

design peers in verbal and written form.

A proactive learner with strong analytical and problem-solving skills."

Tata Electronics Private Limited (TEPL) is a greenfield venture of the Tata Group with expertise in manufacturing precision components.

Tata Electronics (a wholly owned subsidiary of Tata Sons Pvt. Ltd.) is building India’s first AI-enabled state-of-the-art Semiconductor Foundry. This facility will produce chips for applications such as power management IC, display drivers, microcontrollers (MCU) and high-performance computing logic, addressing the growing demand in markets such as automotive, computing and data storage, wireless communications and artificial intelligence.

Tata Electronics is a subsidiary of the Tata group. The Tata Group operates in more than 100 countries across six continents, with the mission 'To improve the quality of life of the communities we serve globally, through long term stakeholder value creation based on leadership with Trust.’

Senior Technical Program Manager will support the VP of FAE. The TPM manager must have hands-on experience in semiconductor packaging technologies, such as flip chip and wire bond technologies and their applications. Must be familiar with all phases of IC packaging processes and equipment. The TPM will coordinate with FAE team members and factory RnD, NPI, and Production teams to ensure successful execution of customers’ projects and programs. Requires excellent verbal and written communication skills. Good interpersonal skills are essential.

Responsibilities:
Will include the following, other duties may be assigned:

1. Coordinate and manage all customer project related activities in the factory, including establishing and executing plans and key milestones for the customer projects and delivering the objectives on time.
2. Manage and resolve customer issues through closely collaborating with Tata Electronics’ factories, RnD, NPI, and sales teams.
3. Coordinate customer visits to the factory
4. Establish technical credibility, building trust and strong relationships with the customers to ensure quick problem solving above and beyond customer expectations.

Qualifications:

1. Bachelor’s degree in engineering or related fields.
2. Minimum of 10+ years of semiconductor manufacturing experience in assembly and test with in-depth understanding of the IC and/or module assembly and test process, including wire bond and flip chip technologies products.
3. Experience in working with customers and stakeholders of the program to resolve technical issues to support the business success of the program.
4. Strong verbal and written communication skills in English are essential along with interpersonal communications skills. Must be a team player with good organizational, computer and project management skills.
5. Be a quick learner, able to follow instructions and work independently

Job Summary:

We are seeking an experienced and technically proficient Senior Manufacturing Systems Engineer to lead the development, implementation, and continuous improvement of factory information systems in a high-tech semiconductor manufacturing environment. This senior-level role is pivotal in designing and deploying data-driven tools that enhance equipment management, factory reporting, and automation efficiency. The ideal candidate will be an expert in Manufacturing Execution Systems (MES), with a strong background in automation requirements, system validation, and cross-functional collaboration with IT and engineering teams. Strong competence in coding in Python and similar languages relevant to factory reporting is essential. This role requires a proven track record of leading technical teams and delivering complex system solutions in a fast-paced manufacturing environment.

Key Responsibilities:

Factory Systems Development & Integration:

- Collaborate with IT and automation teams to define system architecture and data flow for manufacturing systems.

- Design, develop, and deploy factory reporting tools and equipment management dashboards to support real-time decision-making.

- Lead the integration of MES with factory equipment, data collection platforms, and other enterprise systems.

Automation & Tool Control:

- Define automation requirements for new and existing manufacturing processes.

- Translate operational needs into functional specifications for software and system development.

- Drive implementation of automation solutions that improve factory throughput, yield, and equipment utilization.

System Validation & Performance Monitoring:

- Develop acceptance criteria and testing methodologies to validate the accuracy, reliability, and performance of manufacturing systems.

- Conduct system audits and performance reviews to ensure compliance with operational standards.

- Troubleshoot and resolve system issues in collaboration with IT, process engineering, and equipment teams.

Cross-Functional Leadership:

- Act as the technical liaison between manufacturing, IT, and engineering departments.

- Lead cross-functional projects to implement new system capabilities and enhancements.

- Provide training and documentation to ensure effective system adoption and usage.

- Mentor junior engineers and lead technical teams in the execution of strategic initiatives.

Qualifications:

- Bachelor’s or Master’s degree in Computer Science, Electrical Engineering, Industrial Engineering, or a related field.

- 7+ years of experience in semiconductor manufacturing systems, MES, or factory automation.

- Proven leadership experience managing technical teams and delivering complex system solutions.

- Deep understanding of MES platforms (e.G., Camstar, Applied SmartFactory, Fab300).

- Experience with equipment integration, data acquisition, and factory control systems.

- Strong programming/scripting skills (e.G., SQL, Python, JavaScript) and familiarity with databases and APIs.

- Excellent problem-solving, communication, and project management skills.

Preferred Skills:

- Experience with Industry 4.0 technologies, digital twins, or advanced analytics in manufacturing.

- Familiarity with SEMI standards (e.G., SECS/GEM, EDA).

- Knowledge of IT infrastructure, cybersecurity, and cloud-based manufacturing solutions.

- Certification in project management (e.G., PMP, Agile) or Six Sigma.

Location:
Hyderabad, On-site - WFO

Experience:
5-7 Years

Mode of Interview:
Virtual & F2F

Preferred Candidate:
Local Candidates & Immediate Joiners

Shift Timing:
General Shift

Transport is Provided

Key Skills:

Primary Skills:
5+ Years of experience in SV, UVM, Test Bench Development, Soc, Full-chip verification, any memory experience

Good to Have:
GLS, STA, Python knowledge, circuit characterization

Job Description & Responsibilities:

Design verification role, with experience in

Verilog simulation, UVM methodology, and full-chip verification, with memory experience being

beneficial and preferred

Candidate should have a quick learning ability, a positive attitude, and strong technical skills in

system Verilog and UVM.

Project involves Graphics DDR7, an industry-leading product.

UVM simulation and full-chip verification are key skills, with a minimum educational requirement for a bachelor's degree.

Familiarity with static timing analysis, GLS

Familiarity with circuit characterization, timing libraries - files and formats, timing arcs.

Familiarity with Python automation for test bench development is desirable

Educational Qualification & Other skills:

Strong communication skills, with the ability to convey complex technical concepts to other

design peers in verbal and written form.

A proactive learner with strong analytical and problem-solving skills."

Location:
Hyderabad, On-site - WFO

Experience:
5-7 Years

Mode of Interview:
Virtual & F2F

Preferred Candidate:
Local Candidates & Immediate Joiners

Shift Timing:
General Shift

Transport is Provided

Key Skills:

Primary Skills:
5+ Years of experience in SV, UVM, Test Bench Development, Soc, Full-chip verification, any memory experience

Good to Have:
GLS, STA, Python knowledge, circuit characterization

Job Description & Responsibilities:

Design verification role, with experience in

Verilog simulation, UVM methodology, and full-chip verification, with memory experience being

beneficial and preferred

Candidate should have a quick learning ability, a positive attitude, and strong technical skills in

system Verilog and UVM.

Project involves Graphics DDR7, an industry-leading product.

UVM simulation and full-chip verification are key skills, with a minimum educational requirement for a bachelor's degree.

Familiarity with static timing analysis, GLS

Familiarity with circuit characterization, timing libraries - files and formats, timing arcs.

Familiarity with Python automation for test bench development is desirable

Educational Qualification & Other skills:

Strong communication skills, with the ability to convey complex technical concepts to other

design peers in verbal and written form.

A proactive learner with strong analytical and problem-solving skills."