9,064 Verification Engineer jobs in India
Verification Engineer
Bengaluru, Karnataka
Angel and Genie
Posted 19 days ago
Job Viewed
Job Description
Positions: IP/ SoC Verification Engineer / Senior Verification Engineer
Location: Bangalore
Experience: 4 - 8 Years
Employment type: Full Time, permanent
Salary: 32 Lakhs PA
Key Responsibilities
- Understand the design/arch requirements and create/modify test plan
- Create test suites (SV/UVM, C, etc, as needed) and test benches
- Collaborate closely with the design team to address any design errors
- Perform initial debug of test failures to identify design errors
- Analyse test results (logs, waveforms) and report the observations in case of issues.
- Identify functional cover points and assertions, write test cases/sequences to cover them
- Regress and triage the test cases
- Improve the quality of verification, identify coverage holes, adjust randomization, write new test cases to improve coverage
- Automate verification environment to handle multiple design configurations
- Report verification metrics/status as defined by verification lead/manager
- Review and sign-off verification for tape-out
Required Skills & Knowledge:
Technical Skills
- Good understanding of SoC Architectures
- Test case, assertions and functional coverage planning
- Experience of writing test cases with C, SV/UVM
- Design and development of test bench components (checkers, scoreboard) /test benches using HVLs like System Verilog, specman-e etc from scratch
- Good experience in Functional coverage, assertions coding
- Good experience in code and functional coverage closure
- Excellent programming and Strong debugging skills
- Good knowledge and experience in AMBA ACE, AXI, AHB, APB protocols
- Experience in PCIe 4/5, LPDDR 4/5, GDDR6, SD/eMMC, GBE and other high-speed peripherals
- Experience in CPU/BFM(VIP) based verification
- Experience in boot, reset, clocking, debug and Low power verification
- Experience in performance verification
- Good understanding and experience with Scripting languages like Perl, python, make, wake
- Good experience with EDA simulation and waveform viewer tools
Soft Skills
- Excellent Analytical and problem-solving skills
- Excellent oral and written communication skills
- Orientation towards Innovation
- Good time management and result orientation
Qualification
BE/ B. Tech/ ME/ M. Tech or equivalent in ECE/ EEE/CSE
This advertiser has chosen not to accept applicants from your region.
0
Verification Engineer
Chennai, Tamil Nadu
Anicalls (Pty) Ltd
Posted today
Job Viewed
Job Description
• Responsible for writing tests in UVM to verify various NVMe protocol features in enterprise SSD controller at module and subsystem level.
• Independently develop and debug UVM test cases utilizing his/her in-depth knowledge on NVMe and AXI protocols.
• At least have worked on NVMe protocol and UVM for 2 years in the last four-year time frame.
• Independently develop and debug UVM test cases utilizing his/her in-depth knowledge on NVMe and AXI protocols.
• At least have worked on NVMe protocol and UVM for 2 years in the last four-year time frame.
This advertiser has chosen not to accept applicants from your region.
1
Verification Engineer
Bengaluru, Karnataka
NVIDIA
Posted today
Job Viewed
Job Description
We are currently seeking passionate, highly motivated and creative Verification Engineer with strong verification fundamentals to work in Nvidia’s ASIC Verification team. NVIDIA is solving challenging problems with its vast arsenal of CPUs, GPUs, DPUs and SW, in areas such as Artificial Intelligence, High performance computing, autonomous driving, Gaming, Medical imaging and much more!
As a Verification engineer at Nvidia, you will be expected to plan and implement IP/Cluster/SOC functional verification of designs that constitute our industry's leading SOCs. In this position, you will be responsible for verification of the design, architecture and micro-architecture with opportunities for pre-silicon, emulation, and post-silicon activities. You will get firsthand exposure to high performance CPU subsystem, coherent fabric and many other leading technologies deployed in our chips. You will be working with architects, designers, pre and post silicon verification teams to accomplish your tasks.
What you'll be doing:
Be responsible for verifying the design, architecture and micro-architecture of IP/Cluster/SOC using advanced verification methodologies
Go through architecture/design specification and define the verification scope, come up with test plans, tests and verification infrastructure to verify complex designs
Work with HW architects and designers to make the right verification strategy choices
Use advanced verification methodologies like SV/UVM
What we need to see:
B.Tech/M.Tech with 3+ years of experience in design verification
Experience in verification of complex IPs, sub-systems, SOCs
Expertise in HVL like System Verilog and verification methodologies like UVM
Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB)
Ways to stand out from the crowd:
Good debugging and analytical skills
Scripting knowledge (Python/Perl/shell)
Good communication skills and ability & desire to work as a team player
With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.
This advertiser has chosen not to accept applicants from your region.
2
Verification Engineer
Bangalore, Karnataka
Angel and Genie
Posted today
Job Viewed
Job Description
Positions: IP/ SoC Verification Engineer / Senior Verification Engineer
Location: Bangalore
Experience: 4 - 8 Years
Employment type: Full Time, permanent
Salary: 32 Lakhs PA
Key Responsibilities
- Understand the design/arch requirements and create/modify test plan
- Create test suites (SV/UVM, C, etc, as needed) and test benches
- Collaborate closely with the design team to address any design errors
- Perform initial debug of test failures to identify design errors
- Analyse test results (logs, waveforms) and report the observations in case of issues.
- Identify functional cover points and assertions, write test cases/sequences to cover them
- Regress and triage the test cases
- Improve the quality of verification, identify coverage holes, adjust randomization, write new test cases to improve coverage
- Automate verification environment to handle multiple design configurations
- Report verification metrics/status as defined by verification lead/manager
- Review and sign-off verification for tape-out
Required Skills & Knowledge:
Technical Skills
- Good understanding of SoC Architectures
- Test case, assertions and functional coverage planning
- Experience of writing test cases with C, SV/UVM
- Design and development of test bench components (checkers, scoreboard) /test benches using HVLs like System Verilog, specman-e etc from scratch
- Good experience in Functional coverage, assertions coding
- Good experience in code and functional coverage closure
- Excellent programming and Strong debugging skills
- Good knowledge and experience in AMBA ACE, AXI, AHB, APB protocols
- Experience in PCIe 4/5, LPDDR 4/5, GDDR6, SD/eMMC, GBE and other high-speed peripherals
- Experience in CPU/BFM(VIP) based verification
- Experience in boot, reset, clocking, debug and Low power verification
- Experience in performance verification
- Good understanding and experience with Scripting languages like Perl, python, make, wake
- Good experience with EDA simulation and waveform viewer tools
Soft Skills
- Excellent Analytical and problem-solving skills
- Excellent oral and written communication skills
- Orientation towards Innovation
- Good time management and result orientation
Qualification
BE/ B. Tech/ ME/ M. Tech or equivalent in ECE/ EEE/CSE
This advertiser has chosen not to accept applicants from your region.
3
Verification Engineer
Bangalore, Karnataka
Angel and Genie
Posted 20 days ago
Job Viewed
Job Description
Positions: IP/ SoC Verification Engineer / Senior Verification Engineer
Location: Bangalore
Experience: 4 - 8 Years
Employment type: Full Time, permanent
Salary: 32 Lakhs PA
Key Responsibilities
- Understand the design/arch requirements and create/modify test plan
- Create test suites (SV/UVM, C, etc, as needed) and test benches
- Collaborate closely with the design team to address any design errors
- Perform initial debug of test failures to identify design errors
- Analyse test results (logs, waveforms) and report the observations in case of issues.
- Identify functional cover points and assertions, write test cases/sequences to cover them
- Regress and triage the test cases
- Improve the quality of verification, identify coverage holes, adjust randomization, write new test cases to improve coverage
- Automate verification environment to handle multiple design configurations
- Report verification metrics/status as defined by verification lead/manager
- Review and sign-off verification for tape-out
Required Skills & Knowledge:
Technical Skills
- Good understanding of SoC Architectures
- Test case, assertions and functional coverage planning
- Experience of writing test cases with C, SV/UVM
- Design and development of test bench components (checkers, scoreboard) /test benches using HVLs like System Verilog, specman-e etc from scratch
- Good experience in Functional coverage, assertions coding
- Good experience in code and functional coverage closure
- Excellent programming and Strong debugging skills
- Good knowledge and experience in AMBA ACE, AXI, AHB, APB protocols
- Experience in PCIe 4/5, LPDDR 4/5, GDDR6, SD/eMMC, GBE and other high-speed peripherals
- Experience in CPU/BFM(VIP) based verification
- Experience in boot, reset, clocking, debug and Low power verification
- Experience in performance verification
- Good understanding and experience with Scripting languages like Perl, python, make, wake
- Good experience with EDA simulation and waveform viewer tools
Soft Skills
- Excellent Analytical and problem-solving skills
- Excellent oral and written communication skills
- Orientation towards Innovation
- Good time management and result orientation
Qualification
BE/ B. Tech/ ME/ M. Tech or equivalent in ECE/ EEE/CSE
This advertiser has chosen not to accept applicants from your region.
4
Verification Engineer
Bengaluru, Karnataka
Angel and Genie
Posted today
Job Viewed
Job Description
Positions: IP/ SoC Verification Engineer / Senior Verification Engineer
Location: Bangalore
Experience: 4 - 8 Years
Employment type: Full Time, permanent
Salary: 32 Lakhs PA
Key Responsibilities
- Understand the design/arch requirements and create/modify test plan
- Create test suites (SV/UVM, C, etc, as needed) and test benches
- Collaborate closely with the design team to address any design errors
- Perform initial debug of test failures to identify design errors
- Analyse test results (logs, waveforms) and report the observations in case of issues.
- Identify functional cover points and assertions, write test cases/sequences to cover them
- Regress and triage the test cases
- Improve the quality of verification, identify coverage holes, adjust randomization, write new test cases to improve coverage
- Automate verification environment to handle multiple design configurations
- Report verification metrics/status as defined by verification lead/manager
- Review and sign-off verification for tape-out
Required Skills & Knowledge:
Technical Skills
- Good understanding of SoC Architectures
- Test case, assertions and functional coverage planning
- Experience of writing test cases with C, SV/UVM
- Design and development of test bench components (checkers, scoreboard) /test benches using HVLs like System Verilog, specman-e etc from scratch
- Good experience in Functional coverage, assertions coding
- Good experience in code and functional coverage closure
- Excellent programming and Strong debugging skills
- Good knowledge and experience in AMBA ACE, AXI, AHB, APB protocols
- Experience in PCIe 4/5, LPDDR 4/5, GDDR6, SD/eMMC, GBE and other high-speed peripherals
- Experience in CPU/BFM(VIP) based verification
- Experience in boot, reset, clocking, debug and Low power verification
- Experience in performance verification
- Good understanding and experience with Scripting languages like Perl, python, make, wake
- Good experience with EDA simulation and waveform viewer tools
Soft Skills
- Excellent Analytical and problem-solving skills
- Excellent oral and written communication skills
- Orientation towards Innovation
- Good time management and result orientation
Qualification
BE/ B. Tech/ ME/ M. Tech or equivalent in ECE/ EEE/CSE
This advertiser has chosen not to accept applicants from your region.
5
Senior Verification Engineer
Bangalore, Karnataka
Microsoft Corporation
Posted 1 day ago
Job Viewed
Job Description
Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world. Microsoft's Silicon team builds custom silicon for a diverse set of systems ranging from innovative consumer products like Xbox to high-performance Azure cloud servers, clients, and augmented reality.
We are looking for a ** ** **Sr** **D** **esign** **V** **erification** **E** **ngineers** to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon team. The candidate must be a highly motivated self-starter who will thrive in this cutting-edge technical environment.
Microsoft's mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond
#SCHIEINDIA
**Responsibilities**
The AISoC silicon team is seeking a passionate, driven, and intellectually curious computer/electrical engineer to deliver premium-quality designs once considered impossible. We are responsible for delivering cutting-edge, custom IP and SoC designs that can perform complex and high-performance functions in an extremely efficient manner.
+ Plan the verification of complex design IP/SoC interacting with the architecture and design engineers to identify verification test scenarios.
+ Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools
+ Develop tests using UVM or C/C++ Analyse and debug test failures with designers to deliver functionally correct design.
+ Identify and write functional coverage for stimulus and corner cases.
+ Close coverage to plug verification holes and meet tape out requirements.
**Qualifications**
+ 8 or more years of experience in design verification with a proven track record of delivering complex CPU or SoC IP's
+ In depth knowledge of verification principles, testbenches, stimulus generation, and UVM or C++ based test environments.
+ Solid understanding of computer architecture
+ Substantial background in debugging RTL (Verilog) designs as well as simulation and/or emulation environments
+ Scripting language such as Python or Perl
**Desirable:**
+ Hands on experience in Formal property verification
+ knowledge in high-speed protocols like DDR, PCIe, Ethernet
+ Processor based testbenches and emulation
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.
Microsoft is an equal opportunity employer. Consistent with applicable law, all qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations ( .
We are looking for a ** ** **Sr** **D** **esign** **V** **erification** **E** **ngineers** to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon team. The candidate must be a highly motivated self-starter who will thrive in this cutting-edge technical environment.
Microsoft's mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond
#SCHIEINDIA
**Responsibilities**
The AISoC silicon team is seeking a passionate, driven, and intellectually curious computer/electrical engineer to deliver premium-quality designs once considered impossible. We are responsible for delivering cutting-edge, custom IP and SoC designs that can perform complex and high-performance functions in an extremely efficient manner.
+ Plan the verification of complex design IP/SoC interacting with the architecture and design engineers to identify verification test scenarios.
+ Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools
+ Develop tests using UVM or C/C++ Analyse and debug test failures with designers to deliver functionally correct design.
+ Identify and write functional coverage for stimulus and corner cases.
+ Close coverage to plug verification holes and meet tape out requirements.
**Qualifications**
+ 8 or more years of experience in design verification with a proven track record of delivering complex CPU or SoC IP's
+ In depth knowledge of verification principles, testbenches, stimulus generation, and UVM or C++ based test environments.
+ Solid understanding of computer architecture
+ Substantial background in debugging RTL (Verilog) designs as well as simulation and/or emulation environments
+ Scripting language such as Python or Perl
**Desirable:**
+ Hands on experience in Formal property verification
+ knowledge in high-speed protocols like DDR, PCIe, Ethernet
+ Processor based testbenches and emulation
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.
Microsoft is an equal opportunity employer. Consistent with applicable law, all qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations ( .
This advertiser has chosen not to accept applicants from your region.
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6
IC Verification Engineer
Broadcom
Posted 1 day ago
Job Viewed
Job Description
**Please Note:**
**1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)**
**2. If you already have a Candidate Account, please Sign-In before you apply.**
**Job Description:**
**Job duties include:**
· Develop Test plans for all features for Block/Core/SOC and Write Functional coverage for these features.
· Architect and develop scalable and re-usable testbenches, using the framework of the verification methodology
· Build pseudo-random tests to verify and get to full Functional coverage
· Debug Regression failures, analyze Functional Coverage gaps and improve tests to cover the gaps
· Think differently and out-of-the-box to stress the DUT and verify it in an efficient way.
· Lead the documentation of verification strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design/architecture.
· Drive improvements in Verification in terms of quality and efficiency.
**Requirements:**
· Bachelor's degree in Electrical Engineering or related degree and 8+ years related experience or Master's degree in Electrical Engineering or related degree and 6+ years related experience
· 6+ Years of experience writing and debugging complex test benches
· Must have deep understand of all aspects of Verification from building Testbenches, developing Test plans and pseudo-random tests, Functional coverage.
· Must have proficiency in System Verilog and Verification Methodologies like UVM/VMM/OVM
· Should have exceptionally good command over fundamental OOP principles.
· A good understanding of a complex protocol like PCIe or other multi-layered protocol
· Capability to work independently and deliver.
· Knowledge of PCI Express protocol is desired
**Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**
**If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.**
Welcome! Thank you for your interest in Broadcom!
We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.
For more information please visit our video library ( and check out our Connected by Broadcom ( series.
Follow us on Linked In Broadcom Inc ( .
**1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)**
**2. If you already have a Candidate Account, please Sign-In before you apply.**
**Job Description:**
**Job duties include:**
· Develop Test plans for all features for Block/Core/SOC and Write Functional coverage for these features.
· Architect and develop scalable and re-usable testbenches, using the framework of the verification methodology
· Build pseudo-random tests to verify and get to full Functional coverage
· Debug Regression failures, analyze Functional Coverage gaps and improve tests to cover the gaps
· Think differently and out-of-the-box to stress the DUT and verify it in an efficient way.
· Lead the documentation of verification strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design/architecture.
· Drive improvements in Verification in terms of quality and efficiency.
**Requirements:**
· Bachelor's degree in Electrical Engineering or related degree and 8+ years related experience or Master's degree in Electrical Engineering or related degree and 6+ years related experience
· 6+ Years of experience writing and debugging complex test benches
· Must have deep understand of all aspects of Verification from building Testbenches, developing Test plans and pseudo-random tests, Functional coverage.
· Must have proficiency in System Verilog and Verification Methodologies like UVM/VMM/OVM
· Should have exceptionally good command over fundamental OOP principles.
· A good understanding of a complex protocol like PCIe or other multi-layered protocol
· Capability to work independently and deliver.
· Knowledge of PCI Express protocol is desired
**Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**
**If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.**
Welcome! Thank you for your interest in Broadcom!
We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.
For more information please visit our video library ( and check out our Connected by Broadcom ( series.
Follow us on Linked In Broadcom Inc ( .
This advertiser has chosen not to accept applicants from your region.
7
Design Verification Engineer
Bangalore, Karnataka
Meta
Posted 17 days ago
Job Viewed
Job Description
**Summary:**
The Infra Silicon team at Meta is responsible for designing and building in-house hardware accelerator Application-Specific Integrated Circuits (ASICs) to enhance Meta's computing proficiency with superior capacity and efficiency at lower power and cost. The team focuses on creating domain-specific System on Chips (SoCs) that enable Meta's data centers to execute computationally-intensive workloads, such as video transcoding and AI/ML, with higher performance and lower energy consumption. They are organized into several key areas, including architecture & algorithms, design & micro-architecture, design verification, implementation & backend design, emulation/prototyping, and system on chip (SoC), which collaborate extensively with other teams to deliver comprehensive solutions for various technical domains.
**Required Skills:**
Design Verification Engineer Responsibilities:
1. Develop functional tests based on verification test plan
2. Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage
3. Debug, root-cause and resolve functional failures in the design, partnering with the design/arch team
4. Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality
**Minimum Qualifications:**
Minimum Qualifications:
5. Currently has, or is in the process of obtaining a Bachelor's degree in Electronics Engineering, Computer Engineering, Computer Science, Very Large Scale Integration (VLSI), relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta
6. Experience using constrained-random, coverage driven verification or C/C++ verification
7. Experience in verifying a IP block using standard Design Verification (DV) based techniques
8. Experience in Electronic Design Automation (EDA) tools and scripting (Python, Tool Command Language (TCL), Perl, Shell) used to build tools and flows for verification environments
9. Understanding in at least one of the following areas: computer architecture, Central Processing Unit (CPU), Graphics Processing Unit (GPU), networking, interconnects, fabrics or similar designs
**Preferred Qualifications:**
Preferred Qualifications:
10. Experience debugging fails to the line of RTL, closing out bug fixes, using Verdi or equivalent debug tools
11. Experience with revision control systems like Mercurial(Hg), Git or SVN
12. Experience working in a CPU/GPU environment
13. Currently has, or is in the process of obtaining, a Master's degree in Electronics Engineering, Computer Engineering, Computer Science or similar technical field
14. Experience in development of SystemVerilog/UVM based verification environments from scratch
15. Experience in verification of any peripheral IPs like UART, SPI, I2C and exposure to protocols like APB, AXI
**Industry:** Internet
The Infra Silicon team at Meta is responsible for designing and building in-house hardware accelerator Application-Specific Integrated Circuits (ASICs) to enhance Meta's computing proficiency with superior capacity and efficiency at lower power and cost. The team focuses on creating domain-specific System on Chips (SoCs) that enable Meta's data centers to execute computationally-intensive workloads, such as video transcoding and AI/ML, with higher performance and lower energy consumption. They are organized into several key areas, including architecture & algorithms, design & micro-architecture, design verification, implementation & backend design, emulation/prototyping, and system on chip (SoC), which collaborate extensively with other teams to deliver comprehensive solutions for various technical domains.
**Required Skills:**
Design Verification Engineer Responsibilities:
1. Develop functional tests based on verification test plan
2. Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage
3. Debug, root-cause and resolve functional failures in the design, partnering with the design/arch team
4. Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality
**Minimum Qualifications:**
Minimum Qualifications:
5. Currently has, or is in the process of obtaining a Bachelor's degree in Electronics Engineering, Computer Engineering, Computer Science, Very Large Scale Integration (VLSI), relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta
6. Experience using constrained-random, coverage driven verification or C/C++ verification
7. Experience in verifying a IP block using standard Design Verification (DV) based techniques
8. Experience in Electronic Design Automation (EDA) tools and scripting (Python, Tool Command Language (TCL), Perl, Shell) used to build tools and flows for verification environments
9. Understanding in at least one of the following areas: computer architecture, Central Processing Unit (CPU), Graphics Processing Unit (GPU), networking, interconnects, fabrics or similar designs
**Preferred Qualifications:**
Preferred Qualifications:
10. Experience debugging fails to the line of RTL, closing out bug fixes, using Verdi or equivalent debug tools
11. Experience with revision control systems like Mercurial(Hg), Git or SVN
12. Experience working in a CPU/GPU environment
13. Currently has, or is in the process of obtaining, a Master's degree in Electronics Engineering, Computer Engineering, Computer Science or similar technical field
14. Experience in development of SystemVerilog/UVM based verification environments from scratch
15. Experience in verification of any peripheral IPs like UART, SPI, I2C and exposure to protocols like APB, AXI
**Industry:** Internet
This advertiser has chosen not to accept applicants from your region.
8
Staff Verification Engineer
Bangalore, Karnataka
onsemi
Posted 23 days ago
Job Viewed
Job Description
**Job Description**
We are seeking an experienced **Staff ASIC Verification Engineer** to join our dynamic team. As a verification engineer, you will play a crucial role in ensuring the quality and reliability of our cutting-edge semiconductor designs. If you thrive in a collaborative environment and have a passion for solving complex challenges, this role is for you.
**Responsibilities:**
1. **Verification Planning and Execution** :
2. Develop and execute comprehensive verification plans.
3. Close verification with coverage closure, ensuring high-quality results.
4. Apply standard ASIC verification techniques, including test planning, testbench creation, code and functional coverage, directed and random stimulus generation, and assertions.
5. **Testbench Development** :
6. Create and enhance testbenches using SystemVerilog (OVM/UVM) or other standard testbench languages.
7. Implement reusable Verification IP (VIP) components.
8. Collaborate with third-party VIP providers.
9. **Methodology and Flows** :
10. Demonstrate a solid understanding of ASIC design and verification methodologies.
11. Apply object-oriented programming principles effectively.
12. Implement constraint random verification methodology.
13. **Technical Skills** :
14. Proficiency in SystemVerilog (OVM/UVM) and other relevant languages (C/C++, Perl, Tcl, Python, Verilog PLI).
15. Familiarity with industry standards (e.g., I2C/SPI).
16. Experience with low-power verification using UPF (Unified Power Format) is a plus.
17. Knowledge of formal verification techniques is advantageous.
18. **Collaboration and Communication** :
19. Work effectively with internal teams and external customers.
20. Strong written and verbal communication skills.
21. Initiative, analytical problem-solving abilities, and adaptability within a diverse team environment
#LI-RG1
**onsemi** (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world's most complex challenges and leads the way in creating a safer, cleaner, and smarter world.
**More details about our company benefits can be found here:**
are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.
We are seeking an experienced **Staff ASIC Verification Engineer** to join our dynamic team. As a verification engineer, you will play a crucial role in ensuring the quality and reliability of our cutting-edge semiconductor designs. If you thrive in a collaborative environment and have a passion for solving complex challenges, this role is for you.
**Responsibilities:**
1. **Verification Planning and Execution** :
2. Develop and execute comprehensive verification plans.
3. Close verification with coverage closure, ensuring high-quality results.
4. Apply standard ASIC verification techniques, including test planning, testbench creation, code and functional coverage, directed and random stimulus generation, and assertions.
5. **Testbench Development** :
6. Create and enhance testbenches using SystemVerilog (OVM/UVM) or other standard testbench languages.
7. Implement reusable Verification IP (VIP) components.
8. Collaborate with third-party VIP providers.
9. **Methodology and Flows** :
10. Demonstrate a solid understanding of ASIC design and verification methodologies.
11. Apply object-oriented programming principles effectively.
12. Implement constraint random verification methodology.
13. **Technical Skills** :
14. Proficiency in SystemVerilog (OVM/UVM) and other relevant languages (C/C++, Perl, Tcl, Python, Verilog PLI).
15. Familiarity with industry standards (e.g., I2C/SPI).
16. Experience with low-power verification using UPF (Unified Power Format) is a plus.
17. Knowledge of formal verification techniques is advantageous.
18. **Collaboration and Communication** :
19. Work effectively with internal teams and external customers.
20. Strong written and verbal communication skills.
21. Initiative, analytical problem-solving abilities, and adaptability within a diverse team environment
#LI-RG1
**onsemi** (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world's most complex challenges and leads the way in creating a safer, cleaner, and smarter world.
**More details about our company benefits can be found here:**
are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.
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