16,644 Vlsi Design jobs in India

Job Title: VLSI Trainer

Location: Hyderabad

Experience: 1-2 Years (Training/Industry Experience)

Employment Type: Full-time

Company : Galactix Solutions PVT LTD

Job Description:

We are looking for an enthusiastic and knowledgeable VLSI Trainer to join our team. The ideal candidate should have a strong background in VLSI design, verification, and related EDA tools, along with a passion for teaching and mentoring students/professionals. The trainer will be responsible for delivering high-quality training sessions, creating course material, and guiding learners to become job-ready for semiconductor and chip design industries.

Responsibilities:

• Conduct classroom and online training sessions on VLSI design and verification.
• Teach HDL languages (Verilog, VHDL, SystemVerilog) and ASIC/FPGA design flows.
• Provide hands-on training using EDA tools (Cadence, Synopsys, Mentor Graphics, Xilinx, etc.).
• Develop and update training materials, lab exercises, and projects.
• Mentor and guide students on real-time projects and case studies.
• Assess students' performance and provide constructive feedback.
• Stay updated with the latest VLSI industry trends and technologies.

Required Skills & Qualifications:

• Bachelor's/Master's degree in Electronics, Electrical, or VLSI Engineering.
• Strong knowledge of Digital Electronics, CMOS fundamentals, and ASIC/FPGA design.
• Proficiency in HDL programming (Verilog, VHDL, SystemVerilog).
• Experience in front-end (RTL, verification) and/or back-end (synthesis, STA, PnR) design flows.
• Familiarity with industry-standard EDA tools.
• Excellent communication, presentation, and mentoring skills.
• Prior teaching/training experience is an added advantage.

Perks & Benefits:

• Competitive salary package.
• Exposure to industry-standard VLSI tools and workflows.
• Opportunity to mentor the next generation of chip design engineers.
• Growth opportunities in training and research collaborations.

How to Apply:

Interested candidates can share their updated resume at:

Job Type: Full-time

Pay: ₹400, ₹500,000.00 per year

Benefits:

• Provident Fund

Work Location: In person

Hi Folks

ACL Digital is Hiring!

Experience: 4 - 5+ Years

Location: Bangalore / Hyderabad

Looking: Immediate to 20 days

Hiring | RTL Design Engineer

Strong experience in RTL Design using Verilog/System Verilog

Exposure to complex SoC/ASIC design and integration

Hands-on with synthesis, Lint, CDC preferred

Share resume at

#RTLEngineer #ACLdigital #VLSIJobs #ASICDesign #Verilog #SystemVerilog

#SoC

Thanks,

K Himabindu

Analog Layout Design Engineer with 3+ years of relevant work experience

You will be doing Analog Layout in advanced process technologies, serving global Semiconductor product MNC clients.

What you get:

• Inducted in the advanced Analog VLSI projects
• Get an opportunity to work with clients that are world-class VLSI MNCs

Skills:

• Hands-on knowhow in analog and mixed-signal layout techniques and experience with Cadence Layout tools (Virtuoso) and Mentor Graphics verification tools (Calibre)
• Experience in Custom Analog Layout (one or more) of I/O, Amplifiers/OPAMP circuits, ADCs/DACs, LDOs, Bandgaps & Bias Circuits, Temperature Sensor, Oscillators
• Physical Verification ( LVS, DRC, ERC, ANT with Calibre)
• Ability to recognize and correct problematic circuit and layout structures
• Knowledge of relevant device physics, matching techniques, ESD/Latchup mitigation techniques, circuit parasitic extraction & reduction, VXL compliance etc., is expected
• Ability to closely and independently work with Analog Designers to solve performance and area challenges

Traits:

• Quick learner with excellent interpersonal, verbal/written communication, problem-solving, and decision-making skills
• Adaptable, Flexible, Global Approach/Synthesis, Creative
• Willing to work on customer site for deployment and support

Key skills with hand on: ASIC,RTL Design, VLSI-SOC ,AMBA, Lint, CDC, Synopsys LintCDC/VerdiXcellium/Synopsys DC.

Experience: 5 - 25 years

Work Location: Trivandrum, Bangalore, Hyderabad, Chennai, Pune

Education: Engineering (excluding Mechanical/Civil)

Detailed JD:

IP RTL design targeted for SOC, Static checks, some basic protocols

Expertise in SoC subsystem/IP design

Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog

In depth knowledge on RTL quality checks (Lint, CDC )

Knowledge of synthesis and low power is a plus

Good understanding of AMBA bus protocols (AXI, AHB, ATB, APB )

Good understanding of timing concepts

Knowledge of one or more of the interface protocols

PCIe/DDR/Ethernet/I2C,UART/SPI

Expertise in setting up and using tools like

1. Spyglass Lint/CDC
2. Synopsys DC
3. Verdi/Xcellium

Understanding of scripting languages like Make flow, Perl ,shell, python etc

About the Company -
Silicon Interfaces

Silicon Interfaces offers Semiconductor Services for IPs/ASICs/multicore, and our skills and activities are in Functional Verification
Methodologies
(SV/UVM),
Portable Stimulus
and cross-platform technique Reuse (
PSS/DSL
),
Low Power
(UPF),
Fault Simulation
with
AI/ML,
and
Emulation
.

These skills and experience have been effectively used in
the EDA
Industry for
Product Support/Product Validation
and
Regression Testing.

You can ask Agent Betsie for information on this and more at our website at

You can view the latest demos, tutorials, videos, and PredCast on and look for the Playlist' Silicon Interfaces Conferences'

Description
: Silicon Interfaces is looking for VLSI Design Engineers (strictly 2023 or earlier graduates or Master's 2024) experienced as Team Members and Years) Experienced as Team Leads.

Job Description
: Be a part of a specialized team of Engineers working on SystemVerilog/UVM methodology and on new Technologies projects in Portable Stimulus Standards (PSS) based Domain Specific Language (DSL), Fault Simulation, multi-core processor Verification, and Low Power Designs in Data Communications, Wired and Wireless Networking, as well as Interconnect Technologies.

Skills Required: Logic Design, SystemVerilog, UVM and Protocols, like I2C, USB, Ethernet, 802.11, PCI/PCEi, Amba/AXI/CHI, etc. as well as Linux, Gvim/VI, Shell Scripting, Etc

Education
: BE/B.Tech/ME/M.Tech in Electronics and/or Communications Engineering Tier 1/2 Engineering

Colleges - strictly 2023 or earlier graduates or Master's 2024

Silicon Interfaces services a global footprint. Semiconductor Services centers in North America, Europe, and the Asia Pacific by VPN-based logins, in-person Customer site deployment (North America, Europe, and Asia Pacific (including India) and also Offshore projects from our state-of-the-art VLSI Design Centers based out of Mumbai.

The Job is based in Mumbai, India, and the company is currently doing WfO (Work from Office), subject to Government and Health Officials' permission.

Though Safety is the first priority, the Company has an augmented benefits program, including Health and Life Insurance for all employees.

• If you like to apply please send resume with Subject and Description of your background and the post you have applied for by email to

Company Description

We suggest you enter details here

Role Description

This is a full-time, on-site role for a VLSI Design & Verification Engineer located in Coimbatore, Tamil Nadu, India. The VLSI Design & Verification Engineer will be responsible for RTL design and functional verification, formal verification, and debugging. On a day-to-day basis, the engineer will work on designing and verifying complex chip architectures, ensuring compliance with design specifications, and collaborating with cross-functional teams.

Qualifications

• RTL Design and understanding of Computer Architecture
• Functional Verification and knowledge of Formal Verification practices
• Strong Debugging skills
• Experience with verification methodologies and tools
• Excellent problem-solving and analytical skills
• Strong communication and teamwork abilities
• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
• Experience in AI-driven chip design or related areas is a plus

We are looking for a skilled professional with 05-20 years of experience to join our team as a Design Verification Engineer in Bangalore, Hyderabad, Kochi, and Pune. The ideal candidate will have a strong background in VLSI design verification.

Roles and Responsibility

• Develop and implement functional specifications for IPs, subsystems, and SOCs.
• Review and revise system designs using System Verilog and UVM.
• Perform RTL simulations using Synopsys and Cadence simulators.
• Create and verify UPF models.
• Collaborate with cross-functional teams to ensure successful project execution.
• Analyze and debug complex design issues.

Job Requirements

• Strong knowledge of System Verilog, UVM, and RTL simulation tools.
• Experience with functional specifications development and review.
• Familiarity with UPF modeling and simulation.
• Excellent problem-solving skills and attention to detail.
• Ability to work effectively in a team environment.
• Strong communication and interpersonal skills.
• Notice period: Immediate joiners preferred.

How to Apply

To apply, please contact us at or call

Good communication skills, Should have exposure of VLSI teaching.

Knowledge of advance digital design, Verilog, System Verilog, VHDL, FPGA, CMOS.

Hands on experience with industry Standard Tools

Having experience of min 3 years in relevant field.