13,002 Ams Verification Engineer Lead jobs in India

About Analog Devices

Analog Devices, Inc. (NASDAQ: ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at and on and.

AMS Verification Lead – Isolation group

Analog Devices is seeking an experienced Analog Mixed Signal Verification engineer to join its Interface & Isolation group based at its Bangalore Research & Development offices in India. The group is the market leader in galvanic safety isolation products due to its proprietary iCoupler transformers and ‘More Than Moore’ wafer fabrication technologies. As these technology capabilities advance there is an emerging need for greater complexity in the digital and mixed signal verification requirements to bring next generation ground-breaking products to the Medical, Industrial and Test & Measurement markets.

Role

Requirements

The Brushed and Stepper (BSM) Motor drives business product line is part of Motor Drive products group in ASC.BSM products are a key focus area for R&D and product development for TI. Precise Signal, Intelligent Control algorithms and Power transfer are key areas of research and product development for the team. We are looking for experienced, highly driven, fast-learner candidates to join their IC Design & Verification team based in Bangalore, IN. We develop cutting edge, highly differentiated parts across Industrial & Automotive motor drives market. This team has full product development responsibility from definition till releasing product to market. We also take pride in challenging norms on innovation & executing those innovative ideas into products with aggressive, customer-driven timelines.

What can you expect to learn in this role? (Opportunity)

• Close interaction with Systems Team on customer requirements and use cases
• Working closely with analog design to understand chip level requirements and implementation
• Drive DV and test methods for validation/verification of the device
• Understand various DC motor drive systems, key care bouts and development flow
• Post-Si debug

What will you be doing in this role? (Responsibilities)

As AMS DV Engineer for a project/s you are expected to:

• Develop and execute detailed pre-silicon Verification plans working closely with Systems and Applications team and Analog and Digital design teams
• Develop chip-level test-cases and behavioural models for analog blocks based on the verification plan
• Run an automated / regression based DV suite and extract key measurements based on automatic extractors and populate them on Starfish
• Work closely with design and systems teams to review / close spec gaps and design bugs, as they arise
• Implement AMS TBs in Verilog-AMS and / or Cadence Virtuoso to apply stimulus and check for pass/fail criteria
• Drive new and improved methodologies where needed, work with the EDA team to upgrade DV tools and flows
• Incorporate code-coverage, functional coverage, assertions, cover-groups etc to achieve 100% verification completeness prior to tape-out
• Participate in design reviews and create necessary design verification and product documentation
• Work with test engineers / designers to come up with optimized DFT techniques and execute pre-silicon verification of mixed-signal products
• To mentor junior engineers and interns.

Required Qualifications:

Knowledge and Skills

Good grasp of analog design and digital design fundamentals and be able to apply this knowledge to the full chip verification of a mixed signal IC

Understanding of basic analog building blocks and mixed signal blocks.

Strong hands-on working experience in Analog / digital verification for Mixed-signal chips

Ability to write an exhaustive chip level verification plan from the specs

Bachelors / Masters in Electrical / Electronics Engineering

Preferred Skills/ Experience

5+ years of relevant experience

Good in verification approach, flow, concepts and excellent debugging skills

Exposure to any other HVLs (System Verilog, VerilogAMS) as a developer / user.

Experience in metric based Verification closure using Code and Functional coverage

Expertise in automation using Python / Perl / Tcl / shell scripting

The Brushed and Stepper (BSM) Motor drives business product line is part of Motor Drive products group in ASC.BSM products are a key focus area for R&D and product development for TI. Precise Signal, Intelligent Control algorithms and Power transfer are key areas of research and product development for the team. We are looking for experienced, highly driven, fast-learner candidates to join their IC Design & Verification team based in Bangalore, IN. We develop cutting edge, highly differentiated parts across Industrial & Automotive motor drives market. This team has full product development responsibility from definition till releasing product to market. We also take pride in challenging norms on innovation & executing those innovative ideas into products with aggressive, customer-driven timelines.

What can you expect to learn in this role? (Opportunity)

• Close interaction with Systems Team on customer requirements and use cases
• Working closely with analog design to understand chip level requirements and implementation
• Drive DV and test methods for validation/verification of the device
• Understand various DC motor drive systems, key care bouts and development flow
• Post-Si debug

What will you be doing in this role? (Responsibilities)

As AMS DV Engineer for a project/s you are expected to:

• Develop and execute detailed pre-silicon Verification plans working closely with Systems and Applications team and Analog and Digital design teams
• Develop chip-level test-cases and behavioural models for analog blocks based on the verification plan
• Run an automated / regression based DV suite and extract key measurements based on automatic extractors and populate them on Starfish
• Work closely with design and systems teams to review / close spec gaps and design bugs, as they arise
• Implement AMS TBs in Verilog-AMS and / or Cadence Virtuoso to apply stimulus and check for pass/fail criteria
• Drive new and improved methodologies where needed, work with the EDA team to upgrade DV tools and flows
• Incorporate code-coverage, functional coverage, assertions, cover-groups etc to achieve 100% verification completeness prior to tape-out
• Participate in design reviews and create necessary design verification and product documentation
• Work with test engineers / designers to come up with optimized DFT techniques and execute pre-silicon verification of mixed-signal products
• To mentor junior engineers and interns.

Required Qualifications:

Knowledge and Skills

Good grasp of analog design and digital design fundamentals and be able to apply this knowledge to the full chip verification of a mixed signal IC

Understanding of basic analog building blocks and mixed signal blocks.

Strong hands-on working experience in Analog / digital verification for Mixed-signal chips

Ability to write an exhaustive chip level verification plan from the specs

Bachelors / Masters in Electrical / Electronics Engineering

Preferred Skills/ Experience

5+ years of relevant experience

Good in verification approach, flow, concepts and excellent debugging skills

Exposure to any other HVLs (System Verilog, VerilogAMS) as a developer / user.

Experience in metric based Verification closure using Code and Functional coverage

Expertise in automation using Python / Perl / Tcl / shell scripting

Job Description

Experience-4+Yrs

Good fundamentals in analog and mixed signal circuit concepts and topologies.

Experience working with mixed signal verification environment, simulation, and regression tools such as Cadence Virutuoso, Spectre, xCelium, Incisive, vManager, IMC

Ability to read analog schematics and extract related main functionality.

Familiar with Verilog based RTL coding and ASIC design methodology.

Experience in System Verilog for advanced verification methodologies such as assertions, constrained randomization, metric driven, and UVM.

Familiar with behavioral modelling of analog blocks using System Verilog (RNM) and VerilogAMS.

Experience in modelling analog & mixed signal blocks.

Some knowledge of UNIX shell scripting, Perl, Python and TCL scripting

Job Title: AMS Verification Engineer

Experience Required: Minimum 4 years relevant experience is required.

Location: Bangalore, Hyderabad, Noida, Chennai, Ahmedabad, Pune

Key Responsibilities:

• Min 4 Years of overall experience in ASIC Verification
• Should have worked on AMS Verification for minimum of 2 years
• Develop and execute verification plans for AMS designs.
• Create testbenches and run simulations using tools like Cadence Virtuoso, Spectre, or AMS Designer.
• Verify mixed-signal blocks (e.g., ADCs, DACs, PLLs) and ensure proper analog-digital interaction.
• Debug and resolve design issues in collaboration with design teams.
• Document verification results and ensure compliance with design specifications.

L&T Technology is hiring for AMS Verification Engineers with 4-8 Years of experience.

Job Location : Bangalore, India

Below is the key responsibilities ::

• Complete ownership of AMS verification for complex mixed signal blocks like PLL, DFE, transmitters, receivers etc.
• Should understand the JDEC spec for DDR interface and define verification methodology.
• Responsible for test planning, creating testbenches, and verification using Cadence tool mixed signal design flow.
• Knowing RNM (real number model) modelling would be a plus.
• Work closely with Logic and Analog design teams to understand the requirements and feedback the results.
• Responsible for creating schedule, tracking, and raising issues / risks to project management.

Qualifications

• Master’s/ Bachelor’s degree in Electronics Engineering / VLSI/ Microelectronics from a reputed university.
• 4+ years of industry experience in AMS verification.
• Good written and verbal communication skills.
• Good team player with ability to work with cross functional teams.

Job DescriptionExperience-4+YrsGood fundamentals in analog and mixed signal circuit concepts and topologies. Experience working with mixed signal verification environment, simulation, and regression tools such as Cadence Virutuoso, Spectre, x Celium, Incisive, v Manager, IMC Ability to read analog schematics and extract related main functionality. Familiar with Verilog based RTL coding and ASIC design methodology. Experience in System Verilog for advanced verification methodologies such as assertions, constrained randomization, metric driven, and UVM. Familiar with behavioral modelling of analog blocks using System Verilog (RNM) and Verilog AMS. Experience in modelling analog & mixed signal blocks. Some knowledge of UNIX shell scripting, Perl, Python and TCL scripting