4 Software Design jobs in Hyderabad

Job Description:

We are seeking a highly skilled and motivated AI Engineer with expertise in large language models (LLMs), AI workflows, and machine learning. This role combines deep technical knowledge in ML/AI with hands-on experience building intelligent, production-ready systems that enhance cybersecurity investigation, prioritization, and response. You will work at the intersection of LLM-driven automation, workflow orchestration, and classical ML models to improve how alerts are prioritized, classified, and contextualized—reducing fatigue and enabling faster, more effective decision-making.

Your work will directly influence the development of agentic AI systems, workflow automation, and recommendation engines within cloud security platform.

Key Responsibilities

LLM Integration & Workflows:

Build, fine-tune, and integrate large language models (LLMs) into existing systems.

Develop agentic workflows for investigation, classification, and automated response in cybersecurity.

Apply techniques like retrieval-augmented generation (RAG), prompt engineering, and fine-tuning for domain-specific tasks.

Machine Learning Development:

Design, implement, and optimize ML models for prioritization, ranking, clustering, anomaly detection, and classification.

Apply both classical forecasting models (AR, ARIMA, SARIMA, ES) and modern architectures (XGBoost, LSTM, DeepAR, N-BEATS, Temporal Fusion Transformer).

Data Preparation & Feature Engineering:

Collect, preprocess, and transform structured and unstructured data (including logs, text, and access patterns).

Engineer features to maximize model interpretability and performance.

Model Training, Evaluation, and Deployment:

Train and evaluate models using rigorous metrics (precision, recall, AUC, F1, etc.).

Optimize hyperparameters and fine-tune LLMs for task-specific improvements.

Deploy ML/LLM models into production at scale with strong monitoring, drift detection, and observability.

Collaboration & Documentation:

Work closely with data scientists, ML engineers, security researchers, and software teams to build end-to-end solutions.

Document models, workflows, and pipelines for clarity, reproducibility, and knowledge sharing.

Requirements

Bachelor’s/Master’s degree in Computer Science, AI/ML, Data Science, or a related field.

5+ years of experience in ML/AI, including 3+ years deploying production-grade systems.

Experience contributing to publications (patents, libraries, or peer-reviewed papers) is a plus.

Strong knowledge of machine learning algorithms for classification, clustering, ranking, and anomaly detection.

Proficiency with LLM frameworks and APIs (OpenAI, Hugging Face Transformers, LangChain, LlamaIndex).

Hands-on experience building workflow automation with LLMs and integrating them into applications.

Solid programming skills in Python (experience with PyTorch, TensorFlow, scikit-learn).

Knowledge of NLP tasks (text classification, summarization, embeddings, semantic search).

Experience with recommendation systems or reinforcement learning is a strong plus.

Proven track record of deploying ML/AI models into production environments with scalability in mind.

Familiarity with cloud platforms (AWS, GCP, Azure), containerization (Docker, Kubernetes).

Understanding of MLOps best practices (CI/CD for ML, monitoring, retraining strategies).

Strong problem-solving and analytical mindset.

Excellent communication and teamwork skills.

Ability to work in a fast-paced, evolving startup environment.

Write to me at for more details.

Job Title: SoC Design Lead – High-Speed I/O Controller IP

Bangalore / Hyderabad

We are a well-funded early-stage startup building the next generation of high-performance SoC design technologies.

We’re looking for a seasoned SoC Design Lead with deep expertise in microarchitecture and RTL development to drive the design of one of PCIe, CXL, or UCIe controller IP. This is a unique opportunity to shape both our technology roadmap and engineering culture, while working hands-on at the cutting edge of high-speed I/O innovation.

Responsibilities

• Own the microarchitecture for high-speed I/O controllers (PCIe, CXL, UCIe) – from concept to production-ready RTL.
• Lead architectural exploration, research, and specification development, balancing performance, power, and area trade-offs.
• Write and optimize RTL code in Verilog/SystemVerilog, ensuring robust, scalable designs.
• Partner with verification teams to define assertions, test plans, and debug flows, driving high-quality coverage and sign-off.
• Collaborate with physical design engineers on implementation, timing closure, and silicon validation.
• Work closely with software/firmware teams to define configuration, integration, and performance requirements.
• Provide technical leadership and mentorship within the design team, fostering best practices in architecture, coding, and methodology.

Qualifications & Preferred Skills

• BS/MS in Electrical Engineering, Computer Engineering, or Computer Science.
• 12–15 years of hands-on experience in microarchitecture and RTL design.
• Proven track record in large-scale, high-speed, pipelined, and low-power digital designs.
• Deep understanding of at least one high-speed I/O protocol (PCIe, CXL, or UCIe);
  multi-protocol experience is a strong plus.
• Proficiency in Verilog, SystemVerilog, and familiarity with industry-standard EDA tools and flows.
• Experience developing IP blocks for high-speed I/O controllers;
  knowledge of PHY integration is a plus.
• Strong problem-solving and debug skills;
  ability to work across the full chip development lifecycle.
• Familiarity with Python or other modern scripting/programming languages for automation and productivity is a plus.
• Excellent communication skills and a collaborative mindset, with experience working in cross-functional teams.
• Self-starter comfortable in a fast-paced startup environment, with the ability to balance leadership and hands-on contributions.

Contact:

Uday

Mulya Technologies

"Mining The Knowledge Community"

Senior SoC Director / SoC Director

Hyderabad

Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ Bangalore

Our pay comprehensively beats "ALL" Semiconductor product players in the Indian market.

Trust, loyalty, and ability to command Technical respect with foreign partners after having Taped out Successfully multiple chips to high volume production….This should be easily achieved under his/her belt !

• Somebody we can trust to drive on the World stage without embarrassing us

Job Description:

We are seeking an experienced professional to lead full chip design for multi-million gate SoCs. The ideal candidate will have expertise in digital design and RTL development, with a deep understanding of the design convergence cycle, including architecture, micro-architecture, synthesis, timing closure, and verification.

Key Responsibilities:

Proficiency in

AI Accelerators

DNN Accelerators

co-processors

Interconnect Fabric

Cache Coherency

D2D

C2C

We develop highly scalable and innovative AI accelerator chips that offer high performance, low energy, and customer ease of implementation for embedded Edge AI vision-based applications and real-time data processing. Company has working HW & SW for customer sampling, with production designs in the pipeline, and a system architecture designed a future of neuromorphic computing. We are backed by excellent VC funding and is currently in a stage of rapid growth.

While our tech is one of a kind we would not be able to make these advancements without our team. Our collaborative culture is one of the keys to our success.

Who You Are

• You are an open and honest communicator who values your team
• You are innovative, enjoy bringing new ideas to the table and are receptive to ideas and feedback from others
• You’re passionate about advancing the state of the world through new technology
• You enjoy the ambiguity and pace of a startup environment

The role

This leadership role will be responsible for the global VLSI efforts at and It is a highly visible role reporting to Senior Director with ownership of all pre/post Si activities, leading interface with external EDA, IP, Design Service partners, managing the and a global VLSI team.

What you will be doing:

• Ownership of pre-Si Design of the next-gen AI accelerator at driving deliverables with Design and IP Service providers, CAD tools, IPs, DFT/PD/Packaging and Test.
• Work closely with internal Architecture, SW, Emulation, and system board designers on product definition, microarchitecture, and design implementation.
• Build and manage the VLSI team of front-end design and verification engineers across India and Taiwan.
• Establish best practices for development, testing, reviews, and documentation.
• Participate in strategic discussions for product features and roadmap.

What we expect to see:

• BS/MS in Electrical/Electronic Engineering with 18+ years of experience in VLSI, SOC design, several Si tape-out/production.
• Hands-on experience in front-end design, VLSI flows, and working experience for all aspects of Si tape-out, post-Si validation.
• Self-driven, organized with strong leadership and communication skills.
• Experience in building and managing teams with the ability to motivate and lead in a startup environment.
• Proven track record in several successful productizations.

What we would be happy to see:

• Knowledge of AI, specifically Deep Neural Networks
• Application-specific accelerators or co-processors
• Startup experience

Hours: Full time /3 days office-onsite

Employment Opportunity and Benefits of Employment: We are committed to creating and fostering a diverse and inclusive workplace environment for all of our employees. We are an equal opportunity employer.

Contact: Uday

Mulya Technologies

Email: